发明名称 Method for manufacturing field emitter array
摘要 An FEA having a novel structure using an n+shallow junction region, which operates with small voltages and increases emission current and a method for manufacturing the same. A tip is formed on a first conductive type semiconductor substrate, a first impurity region having a high impurity concentration is formed in the upper portion of the semiconductor substrate wherein first conductive type impurities are implanted, and a second conductive type second impurity region is formed in the surface of the semiconductor substrate around the tip and on the first impurity region. Also, a second conductive type shallow junction region is formed in the surface portion of the tip, an insulation layer including a pin hole which exposes the tip is formed on the semiconductor substrate, and a conductive layer having an opening corresponding to the pin hole of the insulation layer is formed on the insulation layer. When electrons are emitted by a tunneling effect, the required voltages to be applied are lowered. Since the tip can be manufactured by a self-aligned manner, the manufacturing process becomes simplified.
申请公布号 US5420054(A) 申请公布日期 1995.05.30
申请号 US19940276468 申请日期 1994.07.18
申请人 SAMSUNG DISPLAY DEVICES CO., LTD. 发明人 CHOI, SUN-JEONG;LEE, GANG-OK;LEE, JONG-DEUK;KWON, SANG-JIK
分类号 H01J1/304;H01J9/02;(IPC1-7):H01L21/266 主分类号 H01J1/304
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