发明名称 MEMORY DEVICE
摘要 <p>PURPOSE:To ensure an easy detection of the error in a simple way for the memory device which uses ROM and RAM selectively according to the data of CPU by providing the detection part at the input side of ROM to detect the writing order signal. CONSTITUTION:CPU11 reads out the data from the program of ROM13 or RAM14 to carry out the process. The address data and the writing data given from CPU are writtern in distribution to RAM14 via memory control part 12. In case these data are distributed mistakenly to ROM13, the writing data is sent to ROM13 through detection part 15. Part 15 supplies the detection signal of the writing data to signal conversion output part 17. Part 17 converts the signal sent from part 15 into the prescribed signal and gives the interruption, if necessary, to the converted signal via interruption input circuit 16 and based on the interruption permission of CPU11. Thus, the faulty area of the memory can be detected easily by checking the address which has the interruption. At the same time, the output signal of part 17 can be displayed at the outside.</p>
申请公布号 JPS54106131(A) 申请公布日期 1979.08.20
申请号 JP19780013955 申请日期 1978.02.09
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 NAITOU HIROYUKI;NARABA KEIZOU
分类号 G11C17/00;G06F9/06;G06F12/16;G11C29/08 主分类号 G11C17/00
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