| 摘要 |
PURPOSE:To prevent the application of excessive voltage on circuit elements and to prevent the increase in unbalance of the voltage of a capacitor by effecting the balancing control of the DC input capacitor in a non-load condition and in a light load condition. CONSTITUTION:This circuit is the control circuit for a three-level inverter, wherein the series circuit of the first-fourth semiconductor switching elements whose both ends are connected to a DC power supply circuit and the first and second coupling diodes are provided for three phases and, e.g. PWM control is performed. Even harmonics (sixth harmonic and second harmonic) of a fundamental frequency are added to the output voltage command for each phase of the inverter with a table 13, multipliers 14R, 14S and 14T, adders 15R, 15S and 15T and the like. The magnitudes of the even harmonics, which are added to the output voltage command based on the potential fluctuation at the neutral point of the DC power supply circuit, are determined with an adder 11, an adjustor 12, the multipliers 14R, 14S and 14T and the like. The phase difference alpha between the output voltage command and the harmonics of even-numbered orders is changed in response to the output power factor of the inverter with operating means 16 and 17, adders 18R, 18S and 18T and the like. These parts are provided. |
