发明名称 |
Process for producing memory devices having narrow buried N+ lines |
摘要 |
A process of fabricating a read only memory device (ROM) wherein the buried N+lines have desirable well defined very narrow widths and are closely spaced. In the process, an insulating layer is deposited on the substrate. Openings for the buried N+lines having vertical sidewalls are formed through the insulating layer. Spacer layers are formed on the vertical sidewalls of the openings. Impurities are implanted through the openings. The insulating layers is removed and the substrate is oxidized to form silicon oxide insulation strips over the buried N+implanted regions. Next, the read only memory (ROM) device is completed by fabricating floating gates and overlying control gates between the buried N+lines interconnected by a conductive lines that are orthogonal to the buried N+buried lines.
|
申请公布号 |
US5418176(A) |
申请公布日期 |
1995.05.23 |
申请号 |
US19940197748 |
申请日期 |
1994.02.17 |
申请人 |
UNITED MICROELECTRONICS CORPORATION |
发明人 |
YANG, MING-TZONG;HUANG, CHENG-HAN;HSUE, CHEN-CHIU |
分类号 |
H01L21/8246;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8246 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|