发明名称 Central processing unit checkpoint retry for store-in and store-through cache systems
摘要 A checkpoint retry system for recovery from an error condition in a multiprocessor type central processing unit which may have a store-in or a store-through cache system. At detection of a checkpoint instruction, the system initiates action to save the content of the program status word, the floating point registers, the access registers and the general purpose registers until the store operations are completed for the checkpointed sequence. For processors which have a store-in cache, modified cache data is saved in a store buffer until the checkpointed instructions are completed and then written to a cache which is accessible to other processors in the system. For processors which utilize store-through cache, the modified data for the checkpointed instructions is also stored in the store buffer prior to storage in the system memory.
申请公布号 US5418916(A) 申请公布日期 1995.05.23
申请号 US19900592624 申请日期 1990.10.04
申请人 INTERNATIONAL BUSINESS MACHINES 发明人 HALL, BARBARA A.;HUANG, KEVIN C.;JABUSCH, JOHN D.;NGAI, AGNES Y.
分类号 G06F11/14;G06F12/08;(IPC1-7):G06F11/14 主分类号 G06F11/14
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