发明名称 I/O cache controller containing a buffer memory partitioned into lines accessible by corresponding I/O devices and a directory to track the lines
摘要 A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Access authority is checked to determine whether an input/output device is authorized to access that particular page. If it is not, access is denied. Each input/output device has access to a portion of the cache, so that activity by one device will not interfere with activity by another.
申请公布号 US5418927(A) 申请公布日期 1995.05.23
申请号 US19920996501 申请日期 1992.12.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHANG, ALBERT;LEROM, GEORGE A.;NICHOLSON, JAMES O.;O'QUIN, III, JOHN C.;O'QUIN, II, JOHN T.
分类号 G06F12/08;G06F12/14;G06F13/12;G06F21/24;(IPC1-7):G06F12/14;G06F13/00 主分类号 G06F12/08
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