| 摘要 |
PURPOSE:To shorten the time required for phase re-locking when an input of a reference phase signal is tentatively interrupted without reducing an integration time constant of a loop filter. CONSTITUTION:An analog switch 27 is connected in parallel with a capacitor 26 of a loop filter 2 and the PLL circuit is provided with a signal interruption detection circuit 5 and a loop filter control circuit 6. Then the loop filter control circuit 6 conducts an analog switch 27 for a period when input interruption of a reference phase signal BS at the signal interruption detection circuit 5 to bypass the capacitor 26. Thus, the integration operation of the loop filter 2 is stopped and a control voltage CV is fixed to a control voltage or a voltage close in the steady-state after phase locking. |
