| 摘要 |
<p>PURPOSE:To provide an MPU capable of performing a high-speed operation. CONSTITUTION:In the MPU 1 equipped with memory 2, a CPU 1a which automatically performs a refresh operation after the readout of an instruction from the memory 2, an address bus 4a and a data bus 4b to perform data switching between those memory and CPU, a display data readout circuit which performs the display of data on a display device 3 based on display data stored in the memory 2 is shown. The display data readout circuit is equipped with a display data address circuit 1c in which a display data address is stored, and an address output circuit 1b connected to the display data address circuit 1c and the CPU 1a, and outputs the display data address from the display data address circuit 1c to the address bus 4a when a refresh signal from the CPU 1a is enabled, and outputs an address outputted from the CPU 1a to the address bus 4a when the refresh signal from the CPU 1a is not disabled.</p> |
