发明名称 PEAK LEVEL OR BOTTOM LEVEL DETECTOR
摘要 PURPOSE:To obtain a peak or bottom level detector in which a peak level or a bottom level of an input signal is detected at a high speed and a detected output is kept for a long time. CONSTITUTION:A 1st peak detection circuit A detects a peak level at a high speed and the storage time of the charge stored in a capacitor CA is short. A 2nd peak detection circuit B has a somewhat slow operating speed and the storage time of the charge stored in a capacitor CB is long. The arithmetic operation circuit C takes the sum of detection outputs of the circuits A, B. Furthermore, a very small current source circuit D extracts very small currents from the capacitors CA, CB and a discharge time constant of the charge stored in the capacitors CA, CB is controlled. A peak level or a bottom level outputted from the arithmetic operation circuit C are provided as an output at a high speed by the circuit A and kept for a long time by the circuits B, D.
申请公布号 JPH07135455(A) 申请公布日期 1995.05.23
申请号 JP19930279590 申请日期 1993.11.09
申请人 HAMAMATSU PHOTONICS KK;HITACHI LTD 发明人 SUZUKI TAKAYUKI;KYOMASU MIKIO;YAMASHITA KIICHI;HASEGAWA ATSUSHI;HASEGAWA YUTAKA;HAMAGISHI TAKAHIRO
分类号 H03K5/1532 主分类号 H03K5/1532
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