| 摘要 |
The present invention provides a circuit (10) and method for providing a delayed output signal which is less sensitive to supply variation compared to conventional circuits, has high noise immunity, can be operated at high frequency, and occupies a minimum area on the semiconductor. The delay is provided according to the present invention by separately controlling the discharge currents of a capacitor (26) before and after the trip point voltage of an output inverter (16) of the circuit (10) has been reached. The delay interval is determined primarily by the capacitor value, the voltage difference between the supply and the trip point of the output inverter, and the first discharge current, set by a resistor (24) in series with a transistor (34). The second discharge current is set by a switch (36) having a series of transistors (38, 40).
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