| 摘要 |
Fluctuation of the minimum voltage value allowing determination of the "H" level of an input signal and of maximum voltage value allowing determination of the "L" level of the input signal dependent on the supply voltage is suppressed, in order to enlarge operation margin. A semiconductor integrated circuit device includes a P channel transistor and an N channel transistor constituting a CMOS inverter, an N channel transistor connected in parallel to N channel transistor, and a plurality of N channel transistors for applying a voltage provided by lowering the supply voltage to the gate electrode of N channel transistor, in which a plurality of N channel transistor are connected in series.
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