| 摘要 |
1,202,515. Semi-conductor devices. HITACHI Ltd. 22 Jan., 1969 [24 Jan., 1968; 2 Feb., 19681, No. 3706/69. Heading H1K. In a planar semi-conductor device wherein the PN junctions all terminate on a single surface, this surface being covered by an insulating layer, a second insulating layer is formed over the first insulating layer and a metal layer is formed on the surface of this second insulating layer. the two extra layers providing added protection against moisture or impurity ions penetrating to the semi-conductor surface. The invention may be applied to an IGFET having source 2 and drain 3 regions in a substrate 1, source, drain and gate electrodes 6, 7 and 8, respectively, and an insulating layer 4, 5, which extends over the whole surface of the device. In this embodiment the second insulating layer 9 carrying the metal layer 10 overlies the entire surface area of the source and drain regions and overlaps this area to cover at least the area of extent of the depletion layer which occurs with reverse voltage in use. The metal layer 10 may be in contact with the substrate through an aperture in the insulating layers. The substrate is of silicon and the insulating layer 4, 5 is of silicon oxide. The second insulating layer 9 is of silicon oxide, silicon nitride, aluminium oxide or a resin or plastics material. The metal layer 10 is of aluminium, gold or silver, and the electrodes 6, 7 and 8 are of aluminium, titanium, molybdenum, chromium or platinum. Such IGFETs may be used in integrated circuits, Fig. 11, not shown. The invention may also be applied to a bipolar transistor, Figs. 15-17, not shown, and plastics encapsulated transistors, Fig. 24, not shown. |
