ISOLATION GATE CIRCUIT WITH IMPROVED RELIABILITY IN BURN-IN MODE

摘要

The memory isolation circuit has isolation transistors positioned between a common bit sense amplifier and adjacent memory arrays. The isolation control circuit generates the power supply voltage Vc, and not the boost voltage Vpp, during the burn-in mode of operation. The isolation circuit includes a level conversion circuit that receives an address signal and generates a block selection signal. A driving circuit receives the block selection signal and which selectively controls applications of a first voltage and a second boost voltage to the isolation transistors. A burn-in control circuit connected to the driving circuit prevents the boost voltage being applied by the driving circuit to the isolation transistors during a burn-in test.