CELL-PLATE SENSE AMPLIFIER

摘要

The amplifier increases the bit signal magnitude in the word line, and reduces the power consumption of memory core. The amplifier includes a sense amplifier of DRAM cell which prevecns the information destruction by rearrayment of amplifying signal, the 1st interruption transistor(MPL) which electrically isolates an 1/2 Vdd power line from a storage capacitor(CS) by control signal(PL), the 2nd transistor(MTPL) which electrically isolates the storage capacitor(CS) from the sense amplifier, and the 3rd and 4th transistors(MSM,MSN) which electrically connect to the 2nd input terminal(1D) and bit lines(BL,/BL).