发明名称 |
PARALLEL DISTRIBUTED SAMPLING DESCRAMBLING CIRCUIT FOR DESCRAMBLING CELL-BASE PARALLEL ASYNCHRONOUS TRANSMISSION MODE PHYSICAL LAYER |
摘要 |
PURPOSE: To process parallelly distributed samples for an ATM physical layer at a slower operation speed by processing transmission data parallelly for 8 bits by using a common semiconductor element. CONSTITUTION: When an optional value not '0' is set by using initial value setting signals SETB at the time of initialization, a PRBS generator 22 generates the random number of the 8 bits for executing a prescribed generating polynomial (X<31> +X<28> +1) for distributed sample descrambling. A descrambler 21 adds output signals PN7-PN0 from the generator 22, performs descrambling and then, outputs the next descrambled data TD7-TD0. A sample processor 23 extracts a second bit which is ATM cell data in the random number to be added to a fifth octet and a sixth bit in the random number to be added to a 31st octet and outputs synchronizing signals CRR1 and CRR0 for synchronizing the generator 22.
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申请公布号 |
JPH07123074(A) |
申请公布日期 |
1995.05.12 |
申请号 |
JP19940049195 |
申请日期 |
1994.03.18 |
申请人 |
ELECTRON & TELECOMMUN RES INST;KORIA TELECOMMUN OOSORITEI |
发明人 |
KIMU YON SOBU;CHIE SON IN;PAKU HON SHIKI |
分类号 |
H04K1/04;H04L9/12;H04L9/22;H04Q3/00;(IPC1-7):H04K1/04;H04L12/28 |
主分类号 |
H04K1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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