| 摘要 |
PURPOSE:To bring an FET into interrupted state easily and positively while minimizing the lowering of operating speed by forming an interrupting region having a conductivity type opposite to that of a source region or a drain region at least on one side of a gate electrode layer through an interruption trench. CONSTITUTION:After forming a gate electrode layer 14 on the surface of a semiconductor substrate 10 through a gate insulation film 12, N<+> type source and drain regions 18, 20 are formed, respectively, on the opposite sides of the gate electrode layer 14. The surface of the substrate 10 is then selectively etched using the laminate of the gate electrode layer 14 and the gate insulation film 12, along with a resist layer, as a mask thus forming interruption trenches 24, 26, respectively, on the source side and drain side of the gate electrode layer 14. Subsequently, P type interruption regions 28, 30 are formed through the interruption trenches 24, 26 by selective ion implantation using a mask. This method allows to bring a gate insulated FET into interrupted state easily and positively without increasing the capacity of PN junction significantly. |
