Circuit arrangement for clock synchronisation, in which a clock is determined from a data stream with the aid of an injection-type ring oscillator and is synchronised. <IMAGE>
申请公布号
DE4422803(C1)
申请公布日期
1995.05.11
申请号
DE19944422803
申请日期
1994.06.29
申请人
SIEMENS AG, 80333 MUENCHEN, DE
发明人
UNTERRICKER, REINHOLD, DIPL.-ING. DR., 81369 MUENCHEN, DE
