| 摘要 |
<p>A frame buffer having a memory array (32), circuitry for accessing the array, a plurality of color value registers (C0 and C1) for storing a plurality of color values which may be written to the array, and circuitry for writing to the memory cells a data representing a single pixel, for writing simultaneously to the memory cells data representing a number of pixels equal to the number of conductors (38) on the data bus (38), or for writing simultaneously to the memory cells data representing an entire row of pixels of the array (34 and 36).</p> |
