发明名称 METHOD OF CONTROLLING OXIDE THINNING IN AN EPROM OR FLASH MEMORY ARRAY
摘要 <p>A method of fabricating an electrically-programmable read-only-memory (EPROM) or a flash memory array structure that controls oxide thinning to prevent shorts in the array and trenching of the bit lines is provided. The method includes the following steps. First, in accordance with conventional processing techniques, layers of gate oxide, poly1, ONO, poly cap, and nitride are sequentially deposited on the substrate. Next, in accordance with the present invention, a layer of thin poly is deposited on the layer of nitride. The thin poly/nitride/poly cap/ONO/poly1 layers are then etched to define thin poly/nitride/poly cap/ONO/poly1 parallel strips. Edge oxide is then formed on the thin poly/nitride/poly cap/ONO/poly1 strips. Following this, a layer of spacer oxide is formed over the layer of edge oxide. An anisotropic etch back of the layers of spacer oxide and edge oxide is then performed until the thin poly layer and the substrate are exposed. Next, an N-type dopant is introduced into the substrate material between the thin/poly/nitride/poly cap/ONO/poly1 strips to define the N+ buried bit lines of the array. Optionally, a thin layer of edge oxide can be formed over the substrate prior to the introudction of the dopant. Following the formation of the buried bit lines, a layer of differential oxide is grown over the above-described structure and the process then continues according to conventional steps.</p>
申请公布号 WO1995012213(A1) 申请公布日期 1995.05.04
申请号 US1994008133 申请日期 1994.07.15
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址