An interface for pulse width modulation communications.

摘要

An interface for pulse width modulation communications (PWM) for a motor vehicle, based on the use of inverting logic gates (N, N1, N2) to exploit the logic level limiting effect (clamp) in association with low-pass filters (R1, R2, C1; R3, C2; R4, C3) of the RC type. The interface permits the use of a single signal wire without a dedicated ground wire, and a good immunity against electromagnetic disturbances (EMI).