A write buffer for a superpipelined, superscalar microprocessor.

摘要

A superscalar, superpipelined microprocessor having a write buffer located between the central processing unit core and memory cache. The write buffer stores the results of write operations to memory until the cache memory becomes available, i.e., when no high-priority reads are to be performed. The write buffer includes multiple entries that are split into two circular buffer sections for facilitating the interaction with the two core pipelines. Cross-dependency tables are provided for each write buffer entry to ensure that the data is written from the write buffer to memory in program order, while considering any prior data in the opposite section. Non-cacheable reads from memory are also ordered in program order with the writing of data from the write buffer. Features for performing misaligned writes, handling speculative execution, detecting and handling data dependencies and exceptions, and performing gathered writes are also included within the microprocessor.