发明名称 Method and arrangement for controlling memory bank access requests in data processing system
摘要 A selector is arranged to receive two kinds of memory bank access requests: one is a fresh request and the other a request which has been rejected at least once. In the event that the two kinds of requests are applied to the selector simultaneously, the selector allows the request at least once rejected, in preference to a fresh one, to be checked in the following access decision circuit to see if a bank demanded by the selected request is permissible or not. If the bank access request is not allowed at the access decision circuit, it is delayed for a predetermined time period and is again applied to the selector.
申请公布号 US5412792(A) 申请公布日期 1995.05.02
申请号 US19930046485 申请日期 1993.04.09
申请人 NEC CORPORATION 发明人 HASEGAWA, ISAO
分类号 G06F12/06;G06F13/18;(IPC1-7):G06F12/06 主分类号 G06F12/06
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