Method of fabricating a monolithic integrated circuit with at least one CMOS field-effect transistor and one NPN bipolar transistor

摘要

The invention relates to a method of making a monolithic integrated circuit with at least one CMOS field-effect transistor and one npn bipolar transistor wherein a thin oxide layer is covered with a protective polysilicon layer in both the bipolar-transistor area and the field-effect-transistor area.