发明名称 Non-volatile semiconductor device with selecting transistor formed between adjacent memory transistors
摘要 An EEPROM enabling high density integration with less power consumption includes source/drain regions formed on the main surface of a P type silicon substrate, and a pair of memory transistors formed therebetween, and a selecting transistor formed between memory transistors and on the main surface of the P type semiconductor substrate. Memory transistors include control gates, and floating gates, respectively. Writing and erasure of data are conducted taking advantage of F-N tunnel phenomenon through tunnel regions.
申请公布号 US5412600(A) 申请公布日期 1995.05.02
申请号 US19920958060 申请日期 1992.10.08
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 NAKAJIMA, MORIYOSHI
分类号 H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C11/40 主分类号 H01L21/336
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