| 摘要 |
a pixel field divider for dividing the RGB pixel data into an odd number field and an even number field; a synchronization converter for converting a synchronization signal and blank signal of a progressive scanning method into those of an interlaced scanning method; an address/command decoder for decoding the control data in relation to the RGB encode from CPU of the host; and a digital encoder controlled by the decoding data of the address/command decoder, forming the synchronization and blank signals, and pixel data divided into the odd/even number fields into a composite video signal in the interlaced scanning method, and outputting it.
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