Vertical type semiconductor with main current section and emulation current section

摘要

A power DMOS semiconductor device providing improved current detection accuracy can be produced using standard pocessess. The device includes main wells, subwells and a line well which is independent of the main wells and subwells. These wells are formed by doping the surface of a semiconductor substrate with well-forming impurities. The line well surrounds the subwells at a predetermined distance away from the subwells to relax an electric field on the surface of the substrate. Gate electrodes are patterned to form a line opening which surrounds the subwells. The line opening serves as a mask when forming the line well by doping the surface of the substrate with the well-forming impurities. Accordingly, the width of a region between the line well and an adjacent subwell will not fluctuate.