发明名称 |
Method for forming a virtual-ground flash EPROM array with floating gates that are self aligned to the field oxide regions of the array |
摘要 |
The floating gate of a virtual-ground flash electrically programmable read-only-memory (EPROM) cell, which is formed over a portion of a pair of vertically-adjacent field oxide regions, is self aligned to the field oxide regions by utilizing a stacked etch process to define the widths of both the floating gate and the field oxide regions. As a result, the pitch of the cells in the X direction can be substantially reduced.
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申请公布号 |
US5409854(A) |
申请公布日期 |
1995.04.25 |
申请号 |
US19940213903 |
申请日期 |
1994.03.15 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
BERGEMONT, ALBERT M. |
分类号 |
H01L21/8247;(IPC1-7):H01L21/265 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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