发明名称 BIPHASE DEMODULATION CIRCUIT OF VIDEO DISPLAY CLOCK DEVICE
摘要 The circuit demodulating the SMPTE (Society Motion Picture & Television Engineer) time code which is modulated with biphase comprises an edge detecting means (10) forming the trigger pluses from the modulated input data stream; a time window setting means (20) generating the time window pulses whose cycle time is longer than an one clock cycle time (T1) and shorter than the two times of the clock cycle time (2T1); the data detecting means (30) receiving the time window pulses as a data input (D) and the trigger pulses from the edge detecting means as a clock input (CLK); a data converter (40) receiving the time window pulses and converting the output of the data detecting means into the wanted parallel data.
申请公布号 KR950004090(B1) 申请公布日期 1995.04.25
申请号 KR19920022574 申请日期 1992.11.27
申请人 SEOUL BROADCASTING SYSTEM CO., LTD. 发明人 YANG, JIN - HWA;HA, TAE - YONG
分类号 G04G3/00;(IPC1-7):G04C9/02 主分类号 G04G3/00
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