发明名称 FLASH MEMORY DEVICE
摘要 <p>PURPOSE: To improve the throughput of programming to a flash memory device by sharing a page buffer circuit between a flash array controller circuit and a user. CONSTITUTION: A page buffer circuit 70 is composed of planes A and B, and in this case, the planes A and B respectively mount static random access memory(SRAM) arrays. Further, the page buffer circuit 70 has a mode control circuit for enabling access through a host bus to the planes A and B in a user mode and access to the planes A and B depending on a flash array controller in a flash array controller mode.</p>
申请公布号 JPH07105072(A) 申请公布日期 1995.04.21
申请号 JP19940150644 申请日期 1994.06.09
申请人 INTEL CORP 发明人 MITSUKII RII FURANDORITSUCHI;OOUEN JIYUNGUROSU;MAMAN RASHIDO;RICHIYAADO JIEI DOURANTO
分类号 G06F12/00;G06F12/06;G11C16/02;G11C16/06;(IPC1-7):G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址