| 摘要 |
PURPOSE:To enhance the integration of semiconductor integrated circuit and to increase yield in the fabrication thereof by eliminating the level difference at the border of memory cell part and peripheral circuit part which causes troubles in the formation of fine pattern. CONSTITUTION:Transistors 9, 12, 13 formed on a semiconductor substrate 1 form a memory cell part A whereas transistors 6, 8 formed on an SOI layer 5 being formed on an insulation film 2 form a peripheral circuit part B. Level difference is eliminated from the peripheral circuit part B by forming the insulation film 2 and the SOI layer 5 having the thicknesses corresponding to those of stacked capacitors 11, 14, 15. |
