Memory checking circuit

摘要

The memory checking circuit has a parity checking circuit (51), a bit memory (52) and a parity generator (53) and is integrated in the memory module (20) of a computer system (10) for the purpose of determining data errors; the computer (10) feeds data on the data bus (31) and the parity signal (32) to the parity checking circuit (51) in order to determine errors in the data read from the memory module (20) and, once an error has been established, to generate an interrupt signal (43) which is fed to the computer (10). <IMAGE>