PERSONAL COMPUTER BUS INTERFACE CIRCUIT

摘要

The efficient 16bit data transmission is allowed by introducing this bus interface circuit comprising a low bus (LB) where a low byte data buffer (2) is connected; a high bus (HB) where a high byte data buffer (3) is connected; a low byte RAM (4) hooked up to the low byte data buffer; a high byte RAM (4) hooked up to the high byte data buffer (3); a state machine logic means (10) analyzing the word unit machine instructions on the PC bus to decode the 7 bits (LA17-LA22) and generates the MEM16 signal to operate the word unit memory control; and an intermediate buffer (12) buffering the intermediate data.