发明名称 Method of fabricating an electrically alterable resistive component on an insulating layer above a semiconductor substrate
摘要 A memory cell includes a pair of spaced apart conductors on an insulating layer, and a novel electrically alterable resistive component between the conductors. This resistive component consists essentially of a single element semiconductor selected from the group of Si, Ge, C, and alpha -Sn, having a crystalline grain size which is smaller than polycrystalline. Dopant atoms in the semiconductor are limited to be less than 1017 atoms/CM3; and, such a doping range includes zero doping. Process temperatures are limited such that all dopant atoms are interstitial in the semiconductor crystals and not substitutional.
申请公布号 US5407851(A) 申请公布日期 1995.04.18
申请号 US19930133479 申请日期 1993.10.07
申请人 UNISYS CORPORATION 发明人 ROESNER, BRUCE B.
分类号 H01L27/112;(IPC1-7):H01L21/265 主分类号 H01L27/112
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