CPSK MODULATOR REMOVING THE DELAY BETWEEN IN-PHASE AND QUAD-PHASE

摘要

a first frequency divider for frequency-dividing the system clock, a second frequency divider for receiving the first frequency dividing signal and outputting the second dividing ratio; a device for generating the digital data in synchronization to the second frequency-dividing signal; a third frequency divider for frequency dividing the digital data by factor two; a delayer for synchronizing the digital data with the second frequency dividing signal, and phase-inverting it.