| 摘要 |
<p>The first electrodes (d1 and d2) of first and second transistors (Q1 and Q2) of the same polarity are coupled to one (1) of first and second voltage supply lines (1 and 2). The second electrode (s1) of the first transistor (Q1) is coupled to the other (2) of the first and second voltage supply lines (1 and 2) by a reference current source (3) for supplying a reference current (Ir) through the first transistor (Q1) and the second electrode (s2) of the second transistor (Q2) is arranged to be coupled to the other (2) of the first and second voltage supply lines (1 and 2) by a load (RL) such that in operation of the circuit majority charge carriers flow through the first and second transistors (Q1 and Q2) in a direction away from the other (2) of the first and second voltage supply lines (1 and 2). The second transistor (Q2) has dimensions which are in a predetermined ratio with corresponding dimensions of the first transistor (Q1). An amplifying arrangement (4) has a negative input (4b) coupled to the second main electrode (s1) of the first transistor (Q1), a positive input (4a) coupled to the second main electrode (s2) of the second transistor (Q2) and an output (4c) coupled to the control electrodes (g1 and g2) of the first and second transistors (Q1 and Q2) for providing a negative feedback for causing, in use of the circuit, voltages at the positive and negative inputs (4a and 4b) of the amplifying arrangement (4) to be equal thereby causing the second transistor (Q2) to supply to the load (RL) coupled between the second main electrode (s2) of the second transistor (Q2) and the other voltage supply line (2) a current (Io) related to the reference current (Ir) in accordance with the predetermined ratio. This circuit enables a constant output current (Io) to be provided with a very high output impedance. <IMAGE></p> |
