发明名称 UNIT AND METHOD FOR ARITHMETIC
摘要 PURPOSE:To provide a unit and method for arithmetic to execute a multiplying instruction or an arithmetic instruction for the sum of products at a high speed. CONSTITUTION:This unit is provided with a redundant binary number multiplying part 1 for generating the redundant binary number multiplied result and a correction term corresponding to the two operation modes of a non-pipeline operation and a pipeline operation, and 1st-3rd intermediate latches 20, 21 and 50 for storing two pairs of partial product added results and correction terms. Further, the unit is provided with a redundant binary number accumulation processing part 3 for accumulating the results of the 1st-3rd intermediate latches 20, 21 and 50 and the value of an accumulated result latch 15 and storing the result in the accumulated result latch 15, and a redundant binary/binary converting part 4 for converting the result of the redundant binary number multiplying part 1 or the result of the redundant binary number accumulation processing part 3 to binary number.
申请公布号 JPH0793132(A) 申请公布日期 1995.04.07
申请号 JP19940084226 申请日期 1994.04.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KABUO HIDEYUKI
分类号 G06F9/38;G06F7/49;G06F7/507;G06F7/508;G06F7/527;G06F7/53;G06F7/533;G06F17/10 主分类号 G06F9/38
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