| 摘要 |
<p>PURPOSE:To write VPI/VCI data in a VCC table, and read the VPI/VCI data for maintenance when the clock signal of a circuit side can not be detected. CONSTITUTION:When the reading request of the VCC table from the circuit side and the writing request of the data or the reading request of the data for maintenance are simultaneously issued, D flip-flops 56 and 58 are turned to a reset state. An output signal (f) of a D flip-flop 66 of the succeeding stage of a shift register 57 is '0' during the four clocks of a clock signal CK2, and the reading request of the VCC table from the circuit side is preferentially executed. Then, when the output signal (f) of the D flip flop 66 is '1' at the fifth clock, a read control signal A or a write signal B are outputted from OR gates 62 and 63, and the writing of the VPI/VCI data or the reading of the data for maintenance is executed.</p> |
