发明名称 IMPLEMENTATION OF A SELECTED INSTRUCTION SET CPU IN PROGRAMMABLE HARDWARE
摘要 A method and resulting system of designing a CPU for implementation in a configurable hardware device by identifying a series of operations in a logic scheme which are suitable for implementation in the device, identifying an executable function and any needed parameters in the logic scheme, identifying the logic flow in the scheme, providing for at least two connected system resources to implement the logic scheme, selecting an op code, and providing a way to implement the various components needed to call and execute the function according to the logic scheme. A useful op code may invoke a system resource, implement the logic scheme, pass a parameter to the function, or invoke the function. The configurable hardware system can function as a CPU, using logic resources including a next address RAM (20), one or more registers (60), a function execution controller (30), and one or more busses (e.g. 70, 80) for passing signals and data between the components and functions.
申请公布号 WO9509392(A1) 申请公布日期 1995.04.06
申请号 WO1993US10674 申请日期 1993.11.05
申请人 GIGA OPERATIONS CORPORATION;TAYLOR, BRAD 发明人 TAYLOR, BRAD
分类号 G06F9/30;G06F9/45;G06F17/50;(IPC1-7):G06F9/00 主分类号 G06F9/30
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