| 摘要 |
In a phase synchronization circuit including a digital phase comparator 1, a synchronism discrimination circuit 2, a charge pump circuit 3, a loop filter 11, a voltage controlled oscillator 14, and a frequency-division circuit 6, the charge pump circuit 3 is composed of a level comparator 15 comparing the output voltage of the loop filter 11 with a predetermined reference voltage, for outputting a level discrimination signal, an AND circuit 4 for outputting a logical product of an output UP of the phase comparator 1 and the level discrimination signal, an inverter 5 for outputting an inverted signal of an output DOWN of the phase comparator 1, an AND circuit 6 for outputting a logical product of an output signal of the inverter 5 and the level discrimination signal, a PMOS transistor 8 having its source connected to a voltage supply through a constant current source 7, its gate applied with an output signal of the AND circuit 4, and its drain connected to an input of the loop filter 11, and an NMOS transistor 9 having its drain connected to the input of the loop filter 11, its gate applied with an output signal of the AND circuit 6, and its source connected to ground through a constant current source 10. <IMAGE> |
