| 摘要 |
<p>An edge transition detector for a static access memory integrated circuit provides programmable operating characteristics. The edge transition detector includes a delay line taking a state signal received on a signal line as an input and generating a delayed state signal. An exclusive-OR gate takes the state signal and the delayed state signal as inputs and generating a transition pulse signal. An edge transition detector enable line connected to the exclusive-OR gate forces the output level of the exclusive-OR gate to match a predetermined logic level in a power efficient manner. An output buffer taking the transition pulse signal as its input and generating an edge detection pulse signal may also be modified to fusing, mask programming, or bonding to eliminate the edge transition detection signal. <IMAGE></p> |
