| 发明名称 |
BINARY ADDER AND/OR SUBTRACTION USING EXCLUSIVE LOGIC |
| 摘要 |
A logical operation circuit device includes a number of exclusive AND/OR logical elements derived from the logical formulas associated with a full added/subtractor. The arrangement provides a full adder/subtractor for operating on one-bit binary digital signals.
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| 申请公布号 |
US3646332(A) |
申请公布日期 |
1972.02.29 |
| 申请号 |
USD3646332 |
申请日期 |
1969.06.27 |
| 申请人 |
TOKYO SHIBAURA ELECTRIC CO. LTD. |
发明人 |
YASOJI SUZUKI |
| 分类号 |
G06F7/501;G06F7/50;G06F7/502;H03K19/0944;H03K19/173;H03K19/21;(IPC1-7):G06F7/50 |
主分类号 |
G06F7/501 |
| 代理机构 |
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