发明名称 Memory cell having floating gate and semiconductor memory using the same
摘要 A memory cell for storing data includes a first field effect transistor having a source receiving a first voltage, a floating gate, and a drain receiving data to be written into the memory cell and outputting the data, and a second field effect transistor having a source receiving a second voltage, a floating gate connected to the floating gate of the first field effect transistor, and a drain connected to the drain of the first field effect transistor. The second field effect transistor has a conduction type opposite to that of the first field effect transistor. The memory cell has a capacitor which has a first terminal receiving a select signal for identifying the memory cell, and a second terminal connected to the floating gates of the first and second field effect transistors. The data is stored in the floating gates of the first and second field effect transistors.
申请公布号 US5404328(A) 申请公布日期 1995.04.04
申请号 US19940262352 申请日期 1994.06.20
申请人 FUJITSU LIMITED 发明人 TAKEMAE, YOSHIHIRO
分类号 G11C17/00;G11C16/04;G11C29/00;H01L21/82;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C11/34 主分类号 G11C17/00
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