| 摘要 |
A secure microprocessor is provided with reduced vulnerability to attack. In the past, the secure operation of such processors has been overcome by observing the behavior of the clock used by the processor. Such observations, and the prediction of subsequent clock pulses therefrom, are prevented by modulating the clock by a substantially random function to provide an unpredictable stream of clock pulses. The secure processor is responsive to the unpredictable stream of clock pulses for processing data in accordance with a security algorithm. |
