发明名称 |
CONTROL CIRCUIT FOR SINGAL SYNCHRONIZATION |
摘要 |
PURPOSE:To realize small sized hardware by forming a means receiving data of a timing error and providing an output of a correction period corresponding to the data with a circuit comprising standard logic components so as to attain high speed processing because no firmware is employed for synchronization control. CONSTITUTION:A logic circuit P1 outputting an error area signal through decoding and a logic circuit P2 outputting a correction period T+ or -DELTAt resulting from correcting a reference period T by a control width DELTAt through decoding are provided in place of the firmware between a timing error DELTAY measurement counter RC1 and a timing generating counter RC2. The high speed counter RC1 and the high speed timer RC2 are employed by using the logic circuits P1, P2 in this way. Moreover, a D-flip-flop FF1 is employed to prevent the effect of a temporary and abnormal change (glitch) of an output of the timing generating counter RC2. |
申请公布号 |
JPH0787072(A) |
申请公布日期 |
1995.03.31 |
申请号 |
JP19930226763 |
申请日期 |
1993.09.13 |
申请人 |
FUJI ELECTRIC CO LTD;FUJI FACOM CORP |
发明人 |
OTA HIDEKI;HIRAMOTO SHINICHI |
分类号 |
H04L7/04 |
主分类号 |
H04L7/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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