发明名称 |
SIMULATION METHOD FOR STRUCTURE OF SEMICONDUCTOR CROSS SECTION |
摘要 |
<p>PURPOSE:To accurately draw a structure of a cross section by drawing a diagram in a desired pixcel value to a desired position of a cross section display pattern to revise the shape of the cross section. CONSTITUTION:A resist display region 51 displayed as a mask pattern when the region is normal is displayed on an Al display region 43a indicating an Al layer being an Al wiring layer. When it is simulated that a residue remains by a defect of development in the case of patterning of the mask pattern, a resist display region 51a indicating the residue is additionally drawn to a location where no mask pattern is substantially in existence. A pattern where an Al display region 43b indicating a short-circuit part is drawn is obtained by drawing an upper layer based on the state. Thus, when residual development is in existence in the development of a resist pattern for patterning of the wiring layer, the short-circuit of the wiring layer is simulated.</p> |
申请公布号 |
JPH0785140(A) |
申请公布日期 |
1995.03.31 |
申请号 |
JP19930248583 |
申请日期 |
1993.09.10 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
TAZAWA SATOSHI;NAKAJIMA BAN;OCHIAI KATSUYUKI |
分类号 |
H01L29/00;G06F17/00;G06F17/50;G06F19/00;G06Q50/00;G06Q50/04;H01L21/00;H01L21/02;(IPC1-7):G06F17/50 |
主分类号 |
H01L29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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