发明名称 VARIABLE DELAY CIRCUIT
摘要 PURPOSE:To provide a voltage control type delay circuit which can always secure a stable delay time even to such a signal that changes irregularly and at a high speed. CONSTITUTION:A P-channel transistor TR P2 is connected between a pull-up P-channel TR P1 whose source electrode is connected to a power potential and a pull-down N-channel TR N1 whose source electrode is connected to a ground potential. The output of an inverter I1 to which a control signal S10 is applied is connected to the gate electrodes of both TR P1 and N1. Then the gate control voltage is applied to the gate electrode of the TR P2. Therefore a constant delay time is always secured even when the control signals are supplied irregularly and at a high speed. Thus the data can be transferred effectively and at a high speed.
申请公布号 JPH0786887(A) 申请公布日期 1995.03.31
申请号 JP19930225773 申请日期 1993.09.10
申请人 MITSUBISHI ELECTRIC CORP 发明人 SATO HISAKAZU
分类号 H03H11/26;H03K5/13 主分类号 H03H11/26
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