| 摘要 |
PURPOSE:To simply monitor the abnormality of a clock driver included in each unit of an electronic device and to improve the reliability of the device. CONSTITUTION:The OFF states of an input clock signal CLa and an output clock signal CLb to/from the clock driver 11 are respectively monitored by the 1st and 2nd signal OFF detecting parts 12, 13, and when the signal CLa is not OFF and the signal CLb is OFF, the abnormality of the driver 11 is judged and an alarm is outputted. Or the phases of the signals CLa, CLb are monitored by a phase difference monitoring part 22, and when the signal CLb generates a phase shift more than a prescribed value from the signal CLa, the abnormality of the driver 21 is judged and an alarm is outputted. |
