发明名称 FIELD PROGRAMABLE DIGITAL SIGNAL PROCESSING ARRAY INTEGRATED CIRCUIT
摘要 PURPOSE: To improve a processing speed by providing an arithmetic and logic circuit in an on-site programmable digital signal processing integrated circuit and storing logic equivalent to a desired analog circuit element in it. CONSTITUTION: This on-site programmable digital signal processing integrated circuit 10 formed by CMOS for instance inside a semiconductor die is provided with the arithmetic and logic circuits (ALUs) 12-1-9 and D/A converters 14-1-2 and A/D converters 16-1-2 , etc., receive off-chip analog input/output signals through an I/C block 18. Mutual connection elements 22 and 24, etc., for mutually connecting respective circuit blocks are arranged and they are provided with an anti-fuse and a path transistor, etc., and enable a mutual connection program by a user. The logic of the respective ALUs is respectively equivalent to the specified analog circuit element and thus, Von-Neumann limitation is evaded.
申请公布号 JPH0786921(A) 申请公布日期 1995.03.31
申请号 JP19940129711 申请日期 1994.05.19
申请人 ACTEL CORP 发明人 JIYON ERU MATSUKARAMU
分类号 G06F7/00;G06F7/575;G06F17/50;G06J1/00;H03K19/177 主分类号 G06F7/00
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