| 摘要 |
PURPOSE:To effectively utilize registers by performing changeover between a first register and a second register operable by the same instruction code as the first register. CONSTITUTION:This processor is constituted of an instruction fetching part 1 for performing three steps of pipeline processings and fetching instructions from an external memory, an instruction decoding part 2 for decoding the instructions fetched in the instruction fetching part 1 and an execution control part (a register switching means and a copying means) 3 for controlling a computing element 16 or the like corresponding to the decoded result of the instruction decoding part 2 and executing the instructions. Then, the respective registers of a general purpose register group 32 are constituted of at least the first register and the second register operable by the same instruction code as the first register and further, the changeover between the first register and the second register is performed by the execution control part 3. Thus, operations and use for the respective first register and second register are made possible and the registers can be effectively utilized. |
