| 摘要 |
<p>PURPOSE:To reduce the coincides return time of a frame pattern by forming a multi-frame pattern in a complete form based on a sub-frame. CONSTITUTION:The circuit is provided with n-sets of frame pattern detection sections 3-1 to 3-n comparing a sub-frame pattern from a frame pattern extract section 1 with a predetermined sub-frame pattern from frame pattern generating sections 2-1 to 2-n to detect a multi-frame pattern, an OR gate 4 Oring output signals of the frame pattern detection sections 3-1 to 3-n to output an output, and also with a protection circuit section 5 receiving an output signal of the OR gate 4 to take protection over a predetermined number of stages and using the result for a multi-frame coincidence output, and a reset pulse generating section 6 detecting a leading or a trailing of the output signal of each of the frame pattern detection sections 3-1 to 3-n to generate a pulse used to reset the protection circuit section 5.</p> |
